3SWAI builds a quantization format and GPU kernels that cut the bytes a GPU streams per generated token – so operators serve the same models with fewer GPU-hours, inside the serving stack they already run.
Internal measurements, August 2026, against GGUF Q4_K_M with importance matrix at matched bits per weight. Independent validation by the Jožef Stefan Institute scheduled for September 2026.
Gartner forecasts 2026 inference spending on AI-optimised infrastructure at $23.3 bn, ahead of training at $19.0 bn – the first time inference leads.
Generating each token means streaming the whole model through the GPU. Throughput is governed by bytes per weight, not by arithmetic.
AWQ, GPTQ and GGUF Q4 are standard practice. The open question for every operator is how few bits you can use before quality visibly drops.
Our quantizer converts a BF16 checkpoint into a packed format with continuously adjustable precision per tensor. Our read kernels multiply on that format directly inside your runtime. You keep vLLM, TensorRT-LLM or ROCm; you change the weights, not the stack.
0.5 to 8.7 bits per weight, chosen per tensor. You pick the operating point on the quality–memory curve per model instead of a fixed 4 / 6 / 8-bit grid.
Consumed the way AWQ or GPTQ checkpoints are. NVIDIA (CUDA) first; ROCm path for AMD to follow. Vendor-neutral by design.
The quantizer runs once per checkpoint on a single server. Serving needs only our read kernels in your existing stack.
We publish only numbers from logged runs with a named model, machine, baseline and bits per weight. Baseline: GGUF Q4_K_M with importance matrix, the strongest widely used open 4-bit recipe. Reference: BF16.
US utility patent application filed November 2025, assigned to Ainnovyze S.à r.l.; response to the first office action submitted. PCT extension and a second filing in preparation.
LOI with the Jožef Stefan Institute for independent testing and benchmarking; validation package delivering September 2026. Nothing has been independently verified yet – and we say so.
No speed-up multiple, no "10×" of anything, no saving we have not measured. Open items: the fewer-bits-at-equal-quality point and GPU tokens/s are being measured now. Full benchmark reports available under NDA.
Bytes per weight govern decode throughput while the GPU is memory-bound. That is most real deployments – and we say where it is not.
32B–70B and above, long contexts, moderate concurrency. On-premises and private deployments where the model must fit and stream on your own GPUs.
AMD Instinct and LPDDR-based inference cards, where memory – not compute – is the binding constraint and vendor formats offer no native low-bit path.
At very high batch sizes on H100 / Blackwell with native FP8 / NVFP4, decode becomes partly compute-bound and the benefit of fewer bytes shrinks. Prefill is not where our advantage lies.
Three effects follow from fewer bytes: fewer GPUs for a fixed load, a model that needed two GPUs fitting on one, and more memory left for KV cache – more concurrent requests, lower energy per token.
One question, answered on your hardware: how many tokens per second per GPU, at what quality, on your model.
One open-weight model you already serve, at two operating points.
Inside your existing serving stack, on your NVIDIA or AMD GPUs. An engineer for two to three days over the period is enough.
Quality (KL, perplexity, a task benchmark of your choice) and throughput against your current 4-bit deployment under one protocol.
You get the measured saving and first-customer pricing. Commercial model: a per-GPU annual licence installed on your own hardware, priced against the saving delivered – or native support through a silicon vendor licence.
Book a pilotVendor formats are fixed-grid and hardware-specific. Ours is per-tensor continuous and hardware-agnostic, delivered as read kernels for the accelerator you run. Nothing leaves your network: the quantizer runs on your server, the kernels run in your stack. Engineered in Europe, deployed anywhere.
Nataša and Uroš have built together for a decade – from graphene production technology to satellite thrusters. In 2025 they focused on 3SWAI; Anže and Jan completed the founding team.
CEO & co-founder. 30+ years leading teams across South-East Asia and Europe; prior exit. Business, go-to-market, investors.
CTO & co-founder, primary inventor. Mathematics and engineering across welding equipment, space technology and data compression; architect of the quantization method and inference engine.
Co-founder, lead developer, co-inventor. Quantization toolchain, runtime, GPU kernels, benchmarking and integration.
Co-founder and first investor. Capital and business development.
Book a 30-minute call. We scope a four-to-six-week pilot on one model you already serve.
Book a pilotWe are raising a round to reach one milestone: a GPU serving product an operator can deploy without changing its stack, and the first customers paying for it. Request the brief and benchmark reports.
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